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Thread: Ater Interface optimization in B10

  1. #1
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    Default Ater Interface optimization in B10

    Alcatel-Lucent presentationm at 2010
    Total Pages:38

    Ater optimization goals:
    1-To globally increase the ratio “actual Gb throughput / Ater resources needed” on
    the GPUs
    – The optimization of the total amount of Ater resources needed on the GPU
    to support its PS traffic will allow to reduce the number of Ater links of the
    GPUs

    2-To decrease the number of TBF establishment failures due to lack of Ater
    resources (for a fixed amount of Ater resources available)
    – A non-optimal usage of Ater resources can lead to failure/blocking
    situations for the incoming traffic on the GPU due to the Ater congestion.


    Agenda
    1. Algorithmic changes for Ater optimization
    2. New telecom parameters
    3. Feature Assessment


    Kindly add rep+Thanx as u find this Doc useful
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    Last edited by echomoon; 2011-11-16 at 09:09 PM

  2. Thanks ahmedtaha, tandat010280, fahid_79, melkaiy thanked for this post
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  4. #2
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    Default Re: Ater Interface optimization in B10

    Many Thanks for sharing....

    Do you have any documents about Ater, Gb and GPU boards dimensioning??

    I will geatly appreciate if anyone share it.

    Thanks for sharing again

  5. #3
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    Default Re: Ater Interface optimization in B10

    Quote Originally Posted by pioneerelex View Post
    Many Thanks for sharing....

    Do you have any documents about Ater, Gb and GPU boards dimensioning??

    I will geatly appreciate if anyone share it.

    Thanks for sharing again
    sorry i dont,u may use search button for ur aim

    br

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